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A high-voltage normally ON 4H-SiC vertical junction field-effect transistor (VJFET) of 0.143- cm2 active area was manufactured in seven photolithographic levels with no epitaxial regrowth and with a single masked ion-implantation event. The VJFET exhibits low gate-to-source p-n-junction leakage current with relatively sharp onset of breakdown. At a drain-current density of 1 mA/cm2, the VJFET blocks 1680 V at a gate bias of -24 V. A self-aligned floating guard-ring structure provides edge termination that blocks 77% of the 11.8-mum SiC drift layer's limit. At a gate bias of 2.5 V and a corresponding gate current of 2 mA, the VJFET outputs 53.6 A (375 A/cm2) at a forward drain voltage drop of 2.08 V (780 W/cm2). The transistor current gain is ID / IG = 26 800, and the specific on-state resistance is 5.5 mOmegamiddotcm2. To our best knowledge, this is the largest area SiC vertical-channel JFET reported to date and outputs more drain current than any 1200-V class vertical-channel JFET under identical heat-load and gate biasing conditions.