Implementation of LDPC Decoder in DVB-S2 Using Min-Sum Algorithm

A new market on digital broadcasting is opening because of the adoption of digital video broadcasting second generation as a digital broadcasting standard in Europe. The DVB-S2 uses a low density parity check, so DVB-S2 has much fast communication speed than conventional DVB which uses Reed-Solomon code and convolutional code for error correction. In this paper, we valuate performance and implement LDPC decoder of FEC which is important sub-system of DVB-S2 using VHDL. The simulated and implemented LDPC decoder is based on the min-sum algorithm.