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Development of fast 3d parasitic extraction using hierarchical method for integrated circuits and packages

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4 Author(s)
Yang Yi ; Texas A&M Univ., College Station, TX ; Shu Yan ; Sarin, V. ; Weiping Shi

Fast and accurate 3D parasitic extraction is very important in design and verification of very large scale integration (VLSI) circuits and electronic packages. In this paper, we review our research in the parasitic extraction using preconditioned hierarchical method, which is a significant improvement over existing methods.

Published in:

Antennas and Propagation Society International Symposium, 2008. AP-S 2008. IEEE

Date of Conference:

5-11 July 2008