By Topic

Aggressive leakage reduction of SRAMs using error checking and correcting (ECC) techniques

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Nourivand, A. ; Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, QC ; Al-Khalili, A.J. ; Savaria, Y.

In this paper, aggressive leakage reduction of static random access memories (SRAMs) during data-retention standby mode using source-biasing is investigated. Source-biasing of cells during standby mode reduces leakage currents significantly. However, to ensure reliable data-retention during standby mode, source-bias voltage should not exceed a critical voltage, called optimum source bias voltage (OSBV). Due to process variations and weak defects, OSBV exhibits an intra-die distribution. Existing leakage reduction techniques choose a worst-case approach by using a source-bias voltage smaller than the lowest OSBV among all cells in an SRAM array. In contrast, we propose raising source-bias voltage beyond worst-case and counter the ensuing unreliability using error checking and correcting (ECC) techniques. In this work, we first model OSBV distribution in the presence of process variations and weak defects. Then, probabilistic models are developed to explore trade-offs between power reduction and overhead of the ECC scheme. It is shown that using conventional single error correcting Hamming codes, leakage is reduced up to 50% compared to that of the worst-case approach.

Published in:

Circuits and Systems, 2008. MWSCAS 2008. 51st Midwest Symposium on

Date of Conference:

10-13 Aug. 2008