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A method for efficient mapping and reliable routing for NoC architectures with minimum bandwidth and area

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2 Author(s)
Haidar M. Harmanani ; Department of Computer Science and Mathematics, Lebanese American University, Byblos, 1401 2010, Lebanon ; Rana Farah

Network-on-chip (NoC) is an on-chip communication methodology that has been proposed as an alternative to bus-based communication in order to cope with the increased complexity in embedded designs. This paper presents a method for assigning tasks to nodes in a 2-D mesh, and for determining the nodes positions on the mesh using simulated annealing. The method proposes a new efficient routing algorithm that minimizes blocking while increasing bandwidth throughput. The method is implemented and various benchmarks are attempted.

Published in:

Circuits and Systems and TAISA Conference, 2008. NEWCAS-TAISA 2008. 2008 Joint 6th International IEEE Northeast Workshop on

Date of Conference:

22-25 June 2008