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In this letter, post-CMOS substrate selective-transformation engineering based on the selectively grown porous silicon (SGPS) technique is demonstrated to effectively suppress substrate crosstalk. The testing structures for crosstalk isolation are fabricated in a standard 0.18-mum CMOS process, and porous silicon trenches are selectively grown after processing from the backside of the silicon wafer. For a testing structure with 250-mum separation on Si, a 42.8-dB improvement (from -23.5 to -66.3 dB) for crosstalk isolation is achieved at 2 GHz. The characteristics of the SGPS substrate have been extracted using the conventional lump element model, which shows that our SGPS technique increases the substrate impedance by one order of magnitude. These results demonstrate that our post-CMOS substrate selective-transformation engineering is very promising for radio frequency system-on-chip applications.
Date of Publication: Sept. 2008