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Synchronously Loaded Optical Packet Buffer

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5 Author(s)
Mack, J.P. ; Electr. & Comput. Eng. Dept., Univ. of California, Santa Barbara, CA ; Burmeister, E.F. ; Poulsen, H.N. ; Bowers, J.E.
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Synchronous optical packet buffering is demonstrated utilizing a fiber-based synchronizer with a photonic integrated circuit packet buffer. Asynchronously arriving packets are optically synchronized to a local frame clock and loaded synchronously into the optical buffer. The synchronizer is a four-stage design with a resolution of 853 ps and a dynamic tuning range of 12.8 ns. The optical packet buffer consists of an integrated 2 × 2 InP switch coupled to a silica-on-silicon 12.8-ns delay line. Packet recovery measurements of 40-B return-to-zero packets at 40 Gb/s show-error free performance for several combinations of synchronizer and buffer delays.

Published in:

Photonics Technology Letters, IEEE  (Volume:20 ,  Issue: 21 )

Date of Publication:

Nov.1, 2008

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