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Integrating Phase-Change Memory Cell With Ge Nanowire Diode for Crosspoint Memory—Experimental Demonstration and Analysis

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6 Author(s)
SangBum Kim ; Dept. of Electr. Eng., Stanford Univ., Stanford, CA ; Yuan Zhang ; James P. McVittie ; Hemanth Jagannathan
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In this paper, we demonstrate a novel phase-change memory cell utilizing a low-temperature in situ doped single crystalline germanium nanowire diode as a bottom electrode as well as a memory-cell selection device. The integrated memory cell shows promising characteristics such as low programming current, large set/reset resistance ratio, and rectifying behavior, which is required for high-density 3-D crosspoint memory. The small contact area determined by the diameter of nanowires enables low programming current below 200 for reset and 50 for set. The average resistance ratio of set/reset state programmed by repetitive pulse programming is 82, which is large enough for large-array operation. The heterojunction formed between in situ doped Ge nanowires and Si substrate provides isolation for crosspoint-memory operation.

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IEEE Transactions on Electron Devices  (Volume:55 ,  Issue: 9 )