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CAD tools for analysis of process variability effects in deep submicron CMOS circuits

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4 Author(s)
W. Kuzmicz ; Warsaw University of Technology, Poland ; E. Piwowarska ; A. Pfitzner ; D. Kasprowicz

A special CAD toolset for process, device and circuit statistical simulation is described. Variability is introduced in the process parameter space, not in the space of parameters of the circuit components. As a result, complex dependencies and correlations between process parameters and circuit performance are taken into account in a realistic way. Application to analysis of static current consumption in deep submicron CMOS digital circuits is demonstrated.

Published in:

Computational Technologies in Electrical and Electronics Engineering, 2008. SIBIRCON 2008. IEEE Region 8 International Conference on

Date of Conference:

21-25 July 2008