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As on-chip circuits have scaled into the deep submicron regime, electromagnetics-based analysis has increasingly become essential for high-performance integrated circuit (IC) design. Not only fast, but also high-capacity electromagnetic solutions are demanded to overcome the large problem size facing on-chip design community. In this paper, we present a novel, high-capacity, and fast approach to the full-wave modeling of 3-D on-chip interconnect structures. In this approach, the interconnect structure is decomposed into a number of seeds. In each seed, the original wave propagation problem is represented as a generalized eigenvalue problem. The resulting eigenvalue representation can comprehend both conductor and dielectric losses, arbitrary dielectric and conductor configuration in the transverse cross section, and arbitrary material. A new mode-matching technique applicable to on-chip interconnects is developed to solve large-scale 3-D problems by using 2-D-like CPU time and memory. A junction matrix acceleration technique is proposed to speed up the mode matching process. A fast frequency sweep technique is employed to obtain the response over the entire frequency band by solving at one or a few frequency points only. An extraction technique is developed to obtain S-parameters from the solution of the eigenvalue system. The entire procedure is numerically rigorous without making any theoretical approximation. Experimental and numerical results demonstrate its accuracy and efficiency.