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For high frequencies of operation, lowering power supplies and shrinking device sizes, prescalers prove to be a major source of power consumption in modern frequency synthesizers. The use of analog injection-locked frequency dividers (ILFDs) has been considered rather than conventional digital prescalers in order to tackle this problem. In recent years, numerous articles have proposed diverse and sometimes contradictory algorithms for estimating the locking range in these dividers. In this paper, a typical (LC oscillator-based) injection-locked frequency divider is considered. By resorting to nonlinear analysis combined with optimization techniques, we propose a new method to predict accurately and improve (widen) the locking range. In order to support our analysis, we provide SPICE simulations in 0.35-mum CMOS technology.