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Grid synchronization method based on a quasi-ideal low-pass filter stage and a phase-locked loop

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5 Author(s)
Robles, E. ; Robotiker-Tecnalia Technol. Corp., Leioa ; Ceballos, S. ; Pou, J. ; Zaragoza, J.
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This paper proposes a new phase-locked loop (PLL) scheme for detection of the positive sequence in three-phase systems. The scheme includes the use of the Park transformation and moving average filters (MAF). Performance of the MAF is mathematically analyzed and represented in Bode diagrams. The analysis allows proper selection of the optimal filterpsilas window width for its application in d-q transformed variables. The proposed detector scheme allows fast detection of the grid voltage positive sequence (within one grid voltage cycle). The MAF completely eliminates any oscillation multiple of the frequency for what it is designed. Thus, this algorithm is not affected by the presence of imbalances or harmonics in the electrical grid. Furthermore, although it is designed to operate under constant frequency, it can also operate properly well in the presence of small grid frequency variations. Performance of the entire PLL-based detector is verified through simulation and experiment. It shows very good performance under several extreme grid voltage conditions.

Published in:

Power Electronics Specialists Conference, 2008. PESC 2008. IEEE

Date of Conference:

15-19 June 2008