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TSNWFET for SRAM cell application: Performance variation and process dependency

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8 Author(s)
Sung Dae Suk ; Adv. Technol. Dev. Team 1, R&D Center, Yongin ; Yun Young Yeoh ; Ming Li ; Kyoung Hwan Yeo
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ION is increased about 25 % with the width/height (W/H) of 12/24 nm nanowire (NW) in comparison with the W/H of 12/12 nm at VG-VTH = 1 V. With these results, we have successfully fabricated NW SRAM arrays with the W/H of 5/15 nm and LG of 40 nm for the first time. Static noise margin (SNM) of 325 mV is achieved at VD = 1 V. NW height and gate oxide thickness dependency of n-ch twin silicon nanowire MOSFET (TSNWFET) on device variations is investigated. Line edge roughness and size variation are more critical than random dopant fluctuation in TSNWFET.

Published in:

VLSI Technology, 2008 Symposium on

Date of Conference:

17-19 June 2008