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5 nm gate length Nanowire-FETs and planar UTB-FETs with pure germanium source/drain stressors and laser-free Melt-Enhanced Dopant (MeltED) diffusion and activation technique

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8 Author(s)
Tsung-Yang Liow ; Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore (NUS), Singapore ; Kian Ming Tan ; Lee, R. ; Ming Zhu
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We report the first demonstration of pure Ge source/drain (S/D) stressors (un embedded) on the ultra-narrow or ultra-thin Si S/D regions of Nanowire-FETs and UTB-FETs, compressively straining the channels to provide up to ~100% IDsat enhancement. Devices with 5 nm gate lengths were fabricated. In addition, we report a novel Melt-Enhanced Dopant (MeltED) diffusion and activation technique to form embedded Ge S/D stressor in the S/D regions of nanowire-FETs, boosting the channel strain even further, and achieving ~125% IDsat enhancement.

Published in:

VLSI Technology, 2008 Symposium on

Date of Conference:

17-19 June 2008