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The authors present a predictive model for the negative bias temperature instability (NBTI) of PMOS under both short term and long term operation. On the basis of the reaction-diffusion mechanism, this model accurately captures the dependence of NBTI on the oxide thickness (t ox), the diffusing species (H or H 2) and other key transistor and design parameters. In addition, a closed form expression for the threshold voltage change (DeltaVth) under multiple cycle dynamic operation is derived. Model accuracy and efficiency were verified with 180, 130 and 90 nm silicon data. The impact of NBTI on the delay degradation of a ring oscillator and the various metrics of the SRAM such as its data retention voltage, read and hold margins, as well as read and write delay, is also investigated.