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An all-digital out-phasing transmitter suitable for software-defined radio (SDR) is presented. It uses a phase-locked loop followed by two digital phase rotator blocks embedded in two delay-locked loops. The chip is fabricated in a 90 nm CMOS process with total active area of 3 mm2, and tested for GSM and WCDMA standards. The whole transmitter excluding phase-to-digital converter (PDC) consumes 55 mA, and current consumption of the PDC is 70 mA.