Cart (Loading....) | Create Account
Close category search window

A merged CMOS digital near-end crosstalk canceller and analog equalizer for multi-lane serial-link receivers

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Jian-Hao Lu ; Grad. Inst. of Electron. Eng.&Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei ; Ke-Hou Chen ; Lee, An-Ming ; Ting-Ying Wu
more authors

A digital near-end crosstalk (NEXT) canceller merged with an analog equalizer for multi-lane serial-link receivers has been realized in 0.13mum CMOS technology. With the proposed sign-sign block least-mean-square (SSB-LMS) circuit, a 5 Gb/s PRBS of 231mnplus1 suffered from both the channel loss and NEXT for 10-inch FR4 traces is successfully equalized. The measured BER is 10-12 and the measured maximum peak-to-peak jitter is 49.7 ps. This chip occupies 0.56times0.76 mm2 and consumes 177 mW including buffers from a 1.2 V supply.

Published in:

VLSI Circuits, 2008 IEEE Symposium on

Date of Conference:

18-20 June 2008

Need Help?

IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.