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A direct conversion receiver adopting balanced three-phase analog system

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3 Author(s)
Takafumi Yamaji ; Corporate R&D Center, Toshiba Corporation, Kawasaki, Japan ; Tetsuro Itakura ; Takeshi Ueno

A new wireless receiver architecture that has small analog area is proposed and evaluation of the core analog blocks is described. To reduce the analog area, a balanced 3-phase analog system is adopted and the functions of analog baseband filters and VGAs are moved to digital domain. The downconverter and ADC are directly connected and they occupy 0.28 mm2.

Published in:

2008 IEEE Symposium on VLSI Circuits

Date of Conference:

18-20 June 2008