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An efficient output phase assignment for PLA minimization

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2 Author(s)
C. -L. Wey ; Dept. of Electr. Eng., Michigan State Univ., East Lansing, MI, USA ; T. -Y. Chang

When a multiple-output function is realized by a PLA (programmable logic array), there is often the option of realizing either true or complementary logic for each output. The tradeoffs in implementing PLAs with and without output phase assignment are explored, and an efficient output phase assignment for PLA minimization is presented. The results of this study show that the proposed algorithm reduces the number of product terms by as much as 50% when the output phase assignment is considered

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:9 ,  Issue: 1 )