Cart (Loading....) | Create Account
Close category search window
 

A graph-based symbolic functional decomposition algorithm for FSM implementation

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Szotkowski, P. ; Warsaw Univ. of Technol., Warsaw ; Rawski, M.

Currently widespread approaches to implementation of finite state machines in Field Programmable Gate Array circuits consist of separate encoding and mapping steps. This paper presents a graph-based algorithm that implements a symbolic functional decomposition of the FSMs - a method that does not pre-encode the machinepsilas states, but instead encodes them gradually during every step of the functional decomposition process (used for mapping the FSM to the FPGA circuitpsilas LUT cells). The symbolic functional decomposition method guarantees high quality of the final decomposition, with better results than the current two-step approaches.

Published in:

Human System Interactions, 2008 Conference on

Date of Conference:

25-27 May 2008

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.