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Integer and floating-point constant multipliers for FPGAs

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3 Author(s)
Nicolas Brisebarre ; LIP (CNRS/INRIA/ENS-Lyon/UCBL), Université de Lyon, France ; Florent de Dinechin ; Jean-Michel Muller

Reconfigurable circuits now have a capacity that allows them to be used as floating-point accelerators. They offer massive parallelism, but also the opportunity to design optimised floating-point hardware operators not available in microprocessors. Multiplication by a constant is an important example of such an operator. This article presents an architecture generator for the correctly rounded multiplication of a floating-point number by a constant. This constant can be a floating-point value, but also an arbitrary irrational number. The multiplication of the significands is an instance of the well-studied problem of constant integer multiplication, for which improvement to existing algorithms are also proposed and evaluated.

Published in:

2008 International Conference on Application-Specific Systems, Architectures and Processors

Date of Conference:

2-4 July 2008