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A Hardware-in-the-Loop Simulation Environment for Real-Time Systems Development and Architecture Evaluation

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6 Author(s)
Vasily V. Balashov ; Dept. of Comput. Math. & Cybern., Moscow State Univ., Moscow ; Anatoly G. Bakhmurov ; Maxim V. Chistolinov ; Ruslan L. Smeliansky
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In this paper we present a technology for integration of distributed real-time embedded systems (RTES) based on hardware-in-the loop simulation. The environment to support this technology is described. This environment also enables simulation-based evaluation of RTES architecture on early stages of RTES development.

Published in:

Dependability of Computer Systems, 2008. DepCos-RELCOMEX '08. Third International Conference on

Date of Conference:

26-28 June 2008