By Topic

A Low-Voltage Micropower Digital Class-D Amplifier Modulator for Hearing Aids

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Adrian, V. ; Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore ; Chang, Joseph S. ; Bah-Hwee Gwee

We present a micropower digital modulator for class-D amplifiers for power-critical digital hearing aids. The modulator design embodies a proposed Lagrange interpolation (a combined first- and second-order Lagrange) algorithmic pulsewidth modulation (PWM) and a third-order DeltaSigma noise shaper. By means of double-Fourier-series analysis, we analyze and determine the harmonic nonlinearities of the proposed algorithmic PWM. At 48-kHz sampling, 96-kHz PWM output, 997-Hz input, and input modulation index=0.9, the modulator circuit achieves a total harmonic distortion+noise &nbsp;(<i>THD</i>+<i>N</i>) of - 74&nbsp;dB (0.02%) over an 8-kHz voice bandwidth-a 12-dB <i>THD</i>+<i>N</i> improvement over a reported design and yet dissipates only ~ 50% of the power. The proposed modulator dissipates the lowest power dissipation of all modulators compared, and by means of a proposed figure of merit, the proposed modulator exhibits very competitive performance. The modulator IC is fabricated in a 0.35-mum digital CMOS process with a core area of 0.46 mm<sup>2</sup>.

Published in:

Circuits and Systems I: Regular Papers, IEEE Transactions on  (Volume:56 ,  Issue: 2 )