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The universal logic block (ULB) and its application to logic design

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1 Author(s)

This report describes the techniques used to obtain two three-variable universal logic blocks from NAND circuits. The emphasis for one of these ULB's is on minimizing NAND blocks; for the other ULB, it is on minimizing input pins. The techniques used for the three variable ULB realization are extended to handle realization of a four-variable ULB. Possible compromises to be made in the ULB approach to logic design, and a proposed system application of the ULB, are also discussed.

Published in:

Switching and Automata Theory, 1966., IEEE Conference Record of Seventh Annual Symposium on

Date of Conference:

26-28 Oct. 1966