Cart (Loading....) | Create Account
Close category search window

Electronic neural net algorithm for maximum entropy solutions to ill-posed problems. II. Multiply connected electronic circuit implementation

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Marrian, C.R.K. ; US Naval Res. Lab., Washington, DC, USA ; Mack, I.A. ; Banks, C. ; Peckerar, M.C.

For pt.I see ibid., vol.36, no.2, p.288-94 (1989). Using standard electronic components, the authors have constructed a multiply connected analog circuit that minimizes a specific cost function of its external inputs, interconnects, and node characteristics. The circuit is designed so that the cost function contains an informational entropy regularizer to give maximum-entropy solutions to ill-posed problems. The circuit performs a gradient search to achieve the minimization in a time defined by a circuit RC time constant rather than the complexity of the problem. The circuit reaches a stable equilibrium condition irrespective of the initial values of its outputs. For the circuit considered, once a partial compensation was made for the input offset voltages of the operational amplifiers used, the solution generated by the circuit was close to the 0.1% estimated for an ideal circuit. Settling times of about 15 ms were observed. The nature of the particular problem chosen required extremely high gains on the constraint nodes in the circuit. The resulting stability problems were overcome by slowing the response of the signal nodes in the circuit

Published in:

Circuits and Systems, IEEE Transactions on  (Volume:37 ,  Issue: 1 )

Date of Publication:

Jan 1990

Need Help?

IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.