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The Design of Storage System for Digital Airborne Camera Based on SOPC

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6 Author(s)

According to the specified standard of airborne Photogrammetry, digital airborne cameras must have higher performance than ordinary civil cameras, which must shoot with shorter time interval and will generate huge data stream. In this paper, a digital airborne camera is designed and implemented in a single FPGA chip as a SOPC approach. The functions of image acquisition, storage and display are implemented by the hardware logic while the functions of control and communication are implemented by the software running in the soft processor core. With the hardware and software cooperation in the single FPGA, the image whose format is RAW is previewed to a VGA monitor while the raw image data can be transferred to an ATA5 hard disk in Ultra DMA mode 4. In testing, this data storing system can achieve the burst speed to 57MB/s and average speed to 25.43MB/S.

Published in:

Image and Signal Processing, 2008. CISP '08. Congress on  (Volume:3 )

Date of Conference:

27-30 May 2008