Skip to Main Content
There is an increasing trend in several biomedical applications such as ECG, PCG, EEG, neural recording, temperature sensing, and blood pressure for signals to be sensed in small portable wireless devices. In this way, analog to digital converters play the main role in these systems. This paper proposes a 10-bit 50-MSample/s pipeline analog to digital converter that has been designed and simulated with standard 1P6M 0.18 um CMOS process. Circuit techniques used include a dynamic comparator, differential operational amplifier and digital correction. A switched capacitor (SC) circuit is instantiated in each of the pipelined stages. Results comprehend a peak SNDR and ENOB of 59.2 dB and 9.54 bit, respectively with a full-scale 1 V sinusoidal input at 2.34375 MHz. Total power dissipation is 50 mW from 1.8 V.