Steady state thermal analysis of a reconfigurable wafer-scale circuit board

During the development of a reconfigurable wafer-scale circuit board, the thermal design aspects have proved crucial to its reliable operation. Reducing thermally induced stress and preventing local overheating remain major concerns when optimizing the capabilities of the WaferBoard
^TM
technology. This paper presents a thermal analysis of that technology. For this study, various thermal boundary conditions are analyzed and thermal profiles with 3D thermal contours are presented. 3D finite element thermal models are used to predict local thermal peaks on the WaferBoardTM structure. This model allows exploring the possibilities to minimize the thermal gradient in the critical areas, especially at the solder balls level. In a second step, thermal stress analysis will be conducted using the temperature loads calculated by steady state thermal analysis.