Low noise radio frequency integrated circuits in 90 nm SOI CMOS up to 60 GHz

In this paper we present the results of several key circuit blocks such as amplifiers, mixers and an oscillator in a 90 nm SOI CMOS technology. The circuits were optimized for low noise. Leading-edge results such as 3.8 dB noise figure (NF) up to 40 GHz and more than 8 dB gain up to 60 GHz for a wideband amplifier, a low loss of only 4.8 dB for a drain pumped transconductance mixer at 35 GHz consuming zero DC power, a third order intercept point (IIP3) of 15 dBm for a resistive mixer, and a phase noise of - 90 dBc/Hz at 1 MHz offset for a 60 GHz VCO (voltage controlled oscillator) are presented.