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This paper discusses electromagnetic (EM) and thermal co-analysis for chip, package and board co-design and co-simulation. The limitation of classical divide-and-conquer approaches based on cascading techniques are investigated in reference to global methodologies where chip, package and board are simulated using one single model methodology. Cascade and single model methodologies are applied to a real-world NXP -semiconductors system-in-package carrier product for simultaneous co-design and co-simulation of chip, package and board, the obtained results are compared both for full-wave and quasi-static assumptions. A global use-model combining EM simulation with thermal analysis is proposed towards multi-physics oriented co-design and co-simulation.