By Topic

60GHz CMOS differential and transformer-coupled power amplifier for compact design

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
LaRocca, T. ; Dept. of Electr. Eng., California Univ., Los Angeles, CA ; Chang, M.-C.F.

A 57-65 GHz differential and transformer-coupled power amplifier using a commercial 90 nm digital CMOS process is presented. On-chip transformers combine bias, stability and input/interstage matching networks for a compact design with an area of 0.15 mm2. The three-stage amplifier consumes 70 mA under 1.2 V supply voltage. The small-signal gain generally exceeds 15 dB with saturated output power levels over 12 dBm and associated peak power-added efficiency (PAE) greater than 20% (14% across the band).

Published in:

Radio Frequency Integrated Circuits Symposium, 2008. RFIC 2008. IEEE

Date of Conference:

June 17 2008-April 17 2008