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Investigation of the influence of process and design on soft error rate in integrated CMOS technologies thanks to Monte Carlo simulation

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7 Author(s)

This work shows the capabilities of Monte Carlo simulation based on nuclear database to identify the influence of device parameters and process on Single Cell Upset and Multicell Upset rates in integrated bulk and SOI CMOS technologies up to 65 nm. The method is applicable both to SRAM and logic cells, and is valid for high energy and thermal neutrons.

Published in:

Reliability Physics Symposium, 2008. IRPS 2008. IEEE International

Date of Conference:

April 27 2008-May 1 2008