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Mechanism of snapback failure induced by the latch-up test in high-voltage CMOS integrated circuits

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6 Author(s)
Jen-Chou Tseng ; Device Technology Development Division, Emerging Technology Center, Winbond Electronics Corporation, Taiwan ; Yu-Lin Chen ; Chung-Ti Hsu ; Fu-Yi Tsai
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An electrical overstress failure induced by a latch-up test is studied in high-voltage integrated cricuits. The latchup test resulted in damage to the output NMOSFET due to snapbach and also resulted in a latch-up in the internal circuits. These mechanisms are analyzed and solutions are proposed to avoid the triggering of the output NMOSFET and the resulting latchup issue.

Published in:

2008 IEEE International Reliability Physics Symposium

Date of Conference:

April 27 2008-May 1 2008