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The integration of vertical natural capacitors (VNCap) into existing backend-of-line (BEOL) stacks is an important aspect to enable radio-frequency and mixed signal features without extra mask costs. From manufacturing and reliability point of view these devices can be rather challenging since they may contain millions of vias and meters of metal interconnects. In this paper we will discuss the robustness of densely packed vertical natural capacitors against time dependent dielectric breakdown (TDDB) with respect to both intrinsic and extrinsic aspects. The intrinsic TDDB of VNCap is sensitively influenced by the design aspects that change the physical spacing within the metal pattern. A strong trade-off between area capacitance and intrinsic TDDB was observed. If the tested VNCap area is large enough, early failures were systematically detected with a certain probability. We will discuss a method that allows the modelling of an early thinning mode due to unavoidable spacing variations within the patterns. Based on this method a criterion is derived to distinguish between early fails that can still be tolerated and extrinsic defects of gross nature that are critical. Furthermore we will present observations on the influence of BEOL process aspects on intrinsic TDDB performance and extrinsic defect density such as CMP slurry and overpolish or time delay after trench etch and copper CMP.