By Topic

Linearity enhancement technology for mixer in monolithic CMOS UHF RFID interrogator

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $33
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
R. -x. Zhang ; Inst. of Microelectron. Circuits & Syst., East China Normal Univ., Shanghai ; C. -q. Shi ; Z. -s. Lai

Linearity requirements characterised by second-order intercept point (IP2) and third-order intercept point (IP3) are recapitulated for the proposed zero-IF receiver in accordance with ETSI and EPC global UHF radio frequency identification (RFID) protocols. To improve linearity of the downconversion mixer without noise penalty, the common mode intermodulation signal feedback through the bleeding current path and the inductively degenerated common source transconductance are adopted. The circuitry is demonstrated in 0.18 m standard CMOS process. The average IP3 for 23 samples is of 15 dBm and the IP2 is boosted from 37 to 52 dBm while drawing 8.7 mA from a 3.3 V power supply. These results show that the mixer is also very promising for other high linearity RF receiver applications.

Published in:

Electronics Letters  (Volume:44 ,  Issue: 14 )