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It is widely recognized that the uncontrollable statistical variability in device characteristics represent major challenges to scaling and integration for present and next generation nano-CMOS transistors and circuits. This will in turn demands revolutionary changes in the way in which future integrated circuits and systems are designed. Strong links must be established between circuit design, system design and fundamental device technology to allow circuits and systems to accommodate the increasing statistical variability. This will add significant complexity to the design process, requiring orchestration of a broad spectrum of design tools by geographically distributed teams of device experts, circuit and system designers. In this talk we review the major sources of variability in CMOS devices focusing at and beyond 45 nm technology generation and beyond. The focus is on intrinsic parameter fluctuations introduced by discreteness of charge and matter, which play an increasingly important role in the present and future CMOS devices and cannot be controlled or reduced by tightening the process tolerances.