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A Technique for Using Model Checkers to Teach Formal Specifications

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2 Author(s)
Salamah, S. ; Dept. of Comput. & Software Eng., Embry-Riddle Aeronaut. Univ., Dayton, OH ; Gates, A.Q.

The difficulty of writing, reading, and understanding formal specifications is one of the main obstacles in adopting formal verification techniques such as model checking and runtime verification. Introducing concepts in formal methods in an undergraduate program is essential for training a workforce that can develop and test high-assurance systems. This paper presents educational outcomes and outlines an instructive component that can be used in an undergraduate course to teach formal approaches and languages. The component uses a model checker and a specification tool to teach Linear Temporal Logic (LTL), a specification language that is widely used in a variety of verification tools. The paper also introduces a novel technique that analyzes LTL specifications by using the SPIN model checker to elucidate the behaviors accepted by the specifications.

Published in:

Software Engineering Education and Training, 2008. CSEET '08. IEEE 21st Conference on

Date of Conference:

14-17 April 2008

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