By Topic

Concurrent error detection in GF(2m) multiplication and its application in elliptic curve cryptography

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Chelton, W. ; Dept. of Electron. & Electr. Eng., Sheffield Univ., Sheffield ; Benaissa, M.

A novel approach to achieve concurrent error detection in finite-field multiplication over GF(2m) that uses multiple-bit interlaced parity codes is presented. These codes are implemented as a generic parity checker, which means they can be used with any multiplier architecture. Relative to the number of parity bits used, much improved delay and error-detection performance are achieved compared to previously reported results, yet for the examples considered the area overhead did not exceed 12%. The proposed work is particularly important for cryptography implementations employing GF(2m) multipliers and requiring reliability and protection against adversarial attacks that use fault induction.

Published in:

Circuits, Devices & Systems, IET  (Volume:2 ,  Issue: 3 )