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Communication and synchronization are two main latency issues in computing FFT on parallel architectures. Both latencies have to be either hidden or tolerated to achieve high performance. One approach to achieve this is by multithreading. Another approach to tolerate latency is to map data efficiently onto the processors' local memory and exploiting data locality. Indirect swap networks, an idea proposed in VLSI circuits can be efficiently used to compute the butterfly computations in FFT. Data mapping in the swap network topology reduces the communication overhead by half at each iteration. Cell broadband engine (Cell/B.E.)processor is a heterogeneous multicoreprocessor for stream data applications and high performance computing. Its eight SIMD processing elements, synergistic processor elements (SPEs), provide multi-folded parallelism. In this paper, we investigate the improved Cooley-Tukey FFT algorithm based on indirect swap network, and design the parallel algorithm taking into consideration all the features of the Cell/B.E. architecture. The performance results show that the new algorithm on Cell/B.E. is 3.7 faster than the cluster for 4K input data size and 6.4 faster than the cluster for 16K input data size at the processor level.