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Wideband Circuit Model of Silicon-Based Interconnects Up to 50 GHz

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6 Author(s)
Gang Luo ; Sch. of Electron. Inf. & Electr. Eng., Shanghai Jiao Tong Univ., Shanghai ; Wen-Yan Yin ; Kai Kang ; Jing-Lin Shi
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This paper presents a wideband circuit model of silicon-based interconnects for predicting their metallic and silicon substrate losses at higher frequencies. The skin and proximity effects in the structure are characterized using the partial element equivalent circuit (PEEC) method, and the parasitic parameters in silicon substrate are captured according to some analytical equations. Good agreements are obtained between the measurement and simulated data up to 50 GHz, with the interconnect samples fabricated using 0.18 um CMOS process.

Published in:

Microwave Conference, 2007. APMC 2007. Asia-Pacific

Date of Conference:

11-14 Dec. 2007

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