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Circuit Modeling and Time Delay Analysis of Double-Walled Carbon Nanotube Interconnects

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2 Author(s)
Ge Fu ; Sch. of Electron. Inf. & Electr. Eng., Shanghai Jiao Tong Univ., Shanghai ; Wen-Yan Yin

An equivalent distributed circuit model of a double- walled carbon nanotube (DWCNT) is proposed in this paper. The comparison in time delay is made between double- and single- walled carbon nanotube (SWCNT) interconnects at different technology levels, such as local, intermediate and global levels. It is shown that using DWCNT the reduction of time delay, as much as 15% to 25% for intermediate and global interconnects, can be expected. Such improvement could be even better as the carbon nanotube(CNT) diameters increase, which offers potential applications in future interconnects.

Published in:

Microwave Conference, 2007. APMC 2007. Asia-Pacific

Date of Conference:

11-14 Dec. 2007