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We have designed and built a LCP-based flip-chip package using Z-interconnect building blocks for reliability and electrical performance. Manufacturing a Z-interconnect substrate involves building mini-substrates (sub-composites) of 2 or 3 layers each, then assembling several mini-substrates together to make the finished product. "Z-interconnect" is used to connect metal layers vertically, using a conductive adhesive. Z-axis interconnection was achieved using joining cores. Through holes in the joining cores, formed by laser drilling and having diameters 60 microns, were filled with an optimized, electrically conductive adhesive. The adhesive- filled joining cores were laminated with circuitized sub- composites to produce a composite structure. High temperature lamination was used to cure the adhesive in the composite and provide Z-interconnection among the circuitized sub-composites. Designing and manufacturing the mini-substrates separately makes it possible to reliably manufacture substrates with no via stubs, very low-loss materials, nearly arbitrary transmission line structures and lots of flexibility to tune features to reduce signal loss. Here we are using 5 sub-composites with 16 metal layers , including 3 0S2P joining cores, 2 2S2P signals cores, plated copper on top and bottom and embedded resistance on layer 7. Each sub-composite (0S2P/2S2P) made with high and low melting point LCP. There was no de-lamination of conductive adhesive filled LCP samples after pressure cooker test (PCT), and solder shock. Evaluation criteria for the test vehicle will include its ability to perform as a reliable, manufacturable, high-performance substrate. Results will be compared to typical ceramic and PTFE chip packages and the improvements over ceramic will be noted.