By Topic

Adaptive biasing circuit overcoming process variation for high-speed circuits in scaled CMOS technology

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Chen, L. ; Dept. of ECE, Univ. of California, Santa Barbara, CA ; Yue, C.P.

A self-biased, VTH tracking current reference circuit is designed in 90 nm CMOS process. A finite state machine automatically adjusts the reference current to achieve plusmn5% deviation across process variation. The bias circuit is used on a differential test circuit and simulation shows a maximum of 8.53% variation in bias current.

Published in:

VLSI Design, Automation and Test, 2008. VLSI-DAT 2008. IEEE International Symposium on

Date of Conference:

23-25 April 2008