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Multiple error diagnosis in large combinational circuits using an efficient parallel vector simulation

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3 Author(s)
Yu-Lin Hsiao ; Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu ; Chun-Yao Wang ; Yung-Chih Chen

This paper presents a parallel vector simulation-based approach to locating multiple errors in large combinational circuits. Two heuristics are proposed to avoid the explosion of the error space. Experimental results on a set of ISCAS'85 and two large benchmarks show that our approach efficiently identifies a small set of correctable nodes that contains the actual error sources. Thus, further error correction can be conducted on the erroneous implementation.

Published in:

VLSI Design, Automation and Test, 2008. VLSI-DAT 2008. IEEE International Symposium on

Date of Conference:

23-25 April 2008

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