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This paper presents ATLAS - a framework for automated analog circuit synthesis that comprises of both topology generation and subsequent circuit sizing. A hierarchically arranged building block or cell library is used in this regard. The adaptively formed library starts only with basic elements and gradually includes functionally useful and bigger blocks, pertinent to the design under consideration. The sizer is based on the simulated annealing algorithm, and HSPICE is used for performance evaluation. The tool has been used to synthesize an operational amplifier and a ring oscillator. Results show that with reasonable computational effort, designs and associated cells have evolved that are human understandable and comparable to hand-crafted designs.
Date of Conference: 18-21 May 2008