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Low-power static and dynamic high-voltage CMOS level-shifter circuits

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7 Author(s)
Khorasani, M. ; Dept. of Electr. & Comput. Eng., Univ. of Alberta, Edmonton, AB ; van den Berg, L. ; Marshall, P. ; Zargham, M.
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Pseudo-NMOS level-shifters consume large static current making them unsuitable for portable devices implemented with HV CMOS. Dynamic level-shifters help reduce power consumption. To reduce on-current to a minimum (sub-nanoamp), modifications are proposed to existing pseudo-NMOS and dynamic level-shifter circuits. A low power three transistor static level-shifter design with a resistive load is also presented.

Published in:

Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on

Date of Conference:

18-21 May 2008