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A reconfigurable multi-stage frequency response masking filter bank architecture for software defined radio receivers

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3 Author(s)
Smitha, K.G. ; Sch. of Comput. EngineeringNanyang Technol., Univ. Nanyang, Singapore ; Mahesh, R. ; Vinod, A.P.

The most computationally demanding part in the digital front-end of a Software radio receiver is the channelizer, which operates at the highest sampling rate. The channelizer extracts multiple narrowband channels from the digitized wideband input signal. The limitation of the conventional uniform Discrete Fourier transform (DFT) filter bank channelizer is that, it is incapable of extracting channels of multiple bandwidths, as the prototype filter has fixed equal bandwidths. Reconfigurable filter bank architecture for the SDR channelizer, based on multi-stage frequency response masking technique is proposed in this paper. The proposed architecture is capable of extracting channels with different bandwidths corresponding to different wireless communication standards. Design examples show that proposed architecture offers a complexity reduction of 97.2 % over the conventional Per-Channel (PC) approach and DFT filter banks.

Published in:

Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on

Date of Conference:

18-21 May 2008