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This paper presents a new technique that increases fault coverage and decreases test application time in test-per-scan built-in self-test (BIST) circuits. The new design, called multi-output linear feedback shift register (MO-LFSR), uses the output of several D-FF cells in the LFSR, selecting one output to be used throughout each scan cycle to feed the scan chain input of a full- scan circuit under test (CUT). Some bits of the LFSR are used at the beginning of a new scan cycle to select which output to be used for this cycle in such a way that the patterns generated by this output can detect some of the random pattern resistant faults (hard to detect faults), hence, increasing the fault coverage and decreasing the test length at the same time. Experimental results on ISCAS'89 benchmark circuits demonstrate that the proposed technique can achieve an average of 3.9% better fault coverage with an average of 60% shorter test length than some of other techniques.