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Complex Shaped On-Wafer Interconnects Modeling for CMOS RFICs

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5 Author(s)
Xiaomeng Shi ; Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore ; Kiat Seng Yeo ; Jian-Guo Ma ; Do, A.V.
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A model development methodology for complex shaped on-wafer interconnects is presented. The equivalent circuit of the entire interconnect is obtained by cascading basic subsegment models. The extracted parameters are formulated into empirical expressions. Thus, the proposed model can be easily incorporated with commercial electronic design automation (EDA) tools. The accuracy of the model is validated by the on-wafer measurements up to 20 GHz.

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Very Large Scale Integration (VLSI) Systems, IEEE Transactions on  (Volume:16 ,  Issue: 7 )