Cart (Loading....) | Create Account
Close category search window

Three-dimensional integration of silicon-on-insulator RF amplifier

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

11 Author(s)
Chen, C.L. ; Lincoln Lab., Massachusetts Inst. of Technol., Lexington, MA ; Chen, C.K. ; Yost, D.-R. ; Knecht, J.M.
more authors

An RF amplifier implemented by wafer-scale three-dimensional integration of three completely fabricated silicon-on-insulator wafers is demonstrated. The MOSFETs are on the top and bottom tier with middle-tier matching circuits. Measured amplifier performance agrees well with simulation and the footprint is approximately 40% smaller than the conventional 2D layout.

Published in:

Electronics Letters  (Volume:44 ,  Issue: 12 )

Date of Publication:

June 5 2008

Need Help?

IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.